        *******************************************
        * CENTurbo II - HARDWARE PROGRAMMING BOOK *
        *                                         *
        * Rev 1.0 - (c) April 2000 Rodolphe Czuba *
        *******************************************
       
Try to use this file on screen and not print it on paper !       
Remember that paper is produced with trees !!


This file is intended to the developers who want to code a new CT2 boot.
Actually, a swedish developer is working on a such thing.
If you want to join the work group, contact me: rczuba@home.com

  
1- CT2 FAMILLY
--------------

There are now 4 revisions (Rev) of the CT2 :
Rev A  - The first one with up to 32 MB of ram at address $04x.
Rev B  - The last one with up to 128 MB of ram at address $04x.
Rev AN - The Rev A with ram at address $01x.
Rev BN - The Rev B with ram at address $01x.

Rev AN & BN are planned, but not yet available.

The PCB is the same between xN and notxN revision; only the logic code
inside the ISP(s) is changed.


2- WHY THE 'N' RELEASE ?
------------------------

When I designed the CT2, I needed logic space in the ISP chips and a decoding of
$04 to $07 was so easier to do than a decoding at $01 to $04. It's only a 
binary frontier question... I did that because the software developer of the
set up proposed me to use the PMMU of the 030 to remap the add $04x to $01x 
because some bad coded programs refuse to run at $04x (don't ask me why).
Even if it is working with the PPMU, we discovered later that some programs 
like OUTSIDE, MAGIC, LINUX original booter, and other, modify the PMMU tree in 
the memory WITHOUT read it before, assuming it is the atari original tree from
the TOS initialization !
The crash is immediate because the new PMMU tree doesn't declare Fast-ram to 
$04x, but at best $01x, and at worse no Fast-Ram at all. 
Finally, because of those bad programmed software, CT2 should not use the PMMU.

But keep in mind that in modern sytems, no user program can touch 
the PMMU tree what is reserved to some system actions only ! But you are on 
atari...


3- HOW TO DETECT THE REVISION OF THE CT2 ?
------------------------------------------

- Rev A or B ?
  
  On Rev A/AN, the FLASH space is shadowed at $F5000000-$F5FFFFFF.
  Read a byte at $F5000000 to know the CT2 revision :
  Flash shadow --> Rev A
  BUS ERROR    --> Rev B

- N release ?
  
  On N releases, the access to $0F000000 is not filtered by the 32-Bit
  logic filter and goes to the mainboard = $000000 (24-bit address).
  Read a word at $0F000000 :
  No BUS ERROR --> Rev A or B (you read the word at $000000 that is
		   remaped by F030 to $E00000 (the TOS ROM !)
  BUS ERROR    --> Rev AN or BN
   
-------------------------------------------------------------------  
   
     --------------------------------------------------------
     CENTurbo 2 Rev A/B/AN/BN - 32-Bit PHYSICAL ADDRESSES MAP
     --------------------------------------------------------
                      Rev 4.0 - March 2000
                       (c) Rodolphe Czuba
                        
-------------------------------------------------------------------
$00000000-$00DFFFFF | ST-RAM			 (14 MB) |
$00E00000-$00EFFFFF | TOS 4.0x ROM		  (1 MB) |
$00F00000-$00F0FFFF | I/O IDE			 (64 KB) |  24-Bit
$00F10000-$00F9FFFF | F030 BUS  SLOT		(576 KB) |  FALCON
$00FA0000-$00FBFFFF | CARTRIDGE SLOT		(128 KB) |  Space
$00FC0000-$00FDFFFF | Not used			(192 KB) |
$00FF0000-$00FFFFFF | I/O			 (64 KB) |
-------------------------------------------------------------------
$01000000-$02FFFFFF | 32-Bit FAST-Ram (Rev AN/BN)(32 MB) |  
$03000000-$08FFFFFF | 32-Bit FAST-Ram (Rev BN)	 (96 MB) |
---------------------------------------------------------|
$04000000-$05FFFFFF | 32-Bit FAST-Ram (Rev A/B)  (32 MB) |
$06000000-$0BFFFFFF | 32-Bit FAST-Ram (Rev B)    (96 MB) |
---------------------------------------------------------|
$0C000000-$7FFFFFFF | Reserved	       	       (1856 MB) |  32-Bit
---------------------------------------------------------|  CT2
$80000000-$EFFFFFFF | Not used - Do not use    (1792 MB) |  Space
---------------------------------------------------------|
$F0000000-$F3FFFFFF | 32-Bit EXP SLOT (Rev A/AN) (64 MB) |
$F4000000-$F5FFFFFF | BOOT FLASH 64KB 		 (32 MB) |
$F6000000-$F6FFFFFF | SET UP Registers		 (16 MB) |
$F7000000-$F7FFFFFF | FAST-Ram Controller	 (16 MB) |
$F8000000-$FEFFFFFF | Reserved                  (112 MB) |
$FF000000-$FFFFFFFF | FALCON 24-Bit SHADOW       (16 MB) |
-------------------------------------------------------------------


                    ----------------
                    SET UP REGISTERS 
                -----------------------
                WRITE BYTE at $F6xx0000
                -----------------------

ADD	NAME	FUNCTION (if set to 1)		REVISION

A18	FLH	FLasH WRITE ENABLE		B/BN
A19	E32	External Clock at 32 MHz 	A/AN
A20     ECO	External Clock OFF      	A/B/AN
A21	IDE	WS on IDE    (Turbo only)	A/B/AN/BN
A22     DSP     WS on DSP    (Turbo only)	A/B/AN/BN
A23	CT2	BOOT on F030 (Turbo only)	A/B/AN/BN
--------------------------------------------------------------
1- Data value are sent by the ADDress lines. By example : to set
   IDE bit at 1, write a byte at $F6200000, where 20 is a byte
   composed by A21 = 1. If you want to set DSP and IDE to 1, write
   to $F6600000, where 60 is composed by A22,A21=1,1.
   Data value (on data bus) don't care.
2- A RESET INSTRUCTION or HARDWARE RESET sets all bits to 0.
3- Read is not possible : use a variable in memory.
4- Externam CLOCK (Bit ECO) is not recommended on Rev B/BN.
   External clock from CT2 B is not wired on some fitting because of
   a recently discovered disturbance of the DSP clock !
   It is not recommended to use this feature that will no longer be 
   supported !
   Don't offer it in the setup of Rev B/BN ! Write bit to 1.
5- FLH,E32 & ECO are available in NORMAL mode too !
6- Bit E32 : 0 = 36 MHz / 1 = 32 MHz on Rev A/AN.
   Rev B as only 32 MHz (no E32 bit).
   Rev BN has no clock at all (no E32 & ECO)!


                -----------------------------
                FAST-Ram CONTROLLER REGISTERS 
             ----------------------------------
             Rev A/AN : BYTE WRITE at $F730C788
	     Rev B/BN : BYTE WRITE at $F700000x 
             ----------------------------------

Rev A/AN
-------- 
Write a BYTE at $F730C788 : this value will be latched by 
the controller. Use only this address.
Any other access to $F7x will modify the controller configuration
and may crash the CT2A/AN if the FAST-Ram is already used !
Only 16 and 32MB EDO SIMM can be used.

Rev B/BN
--------
The memory controller must be configured regarding the size of
EDO that is used :
A BYTE write to $F7000000=  16/32MB SIMM
		$F7000001= 64/128MB SIMM

In general a 32MB SIMM is a doubled 16MB SIMM and a 
128MB is a doubled 64MB SIMM.
But, about 64MB there is a type that needs to be used with
the 16/32 configuration, because of a different matrix in the chips and
a different wiring of the chips on the SIMM. Those 64MB SIMM are rare...
The memory test is a little complex : elimination method from the biggest memory
size case (128 MB : the upper 64MB window) must be practiced.  

 