REGBASE		equ	1	; most are on odd part of data bus
REGLSTEP	equ	4	; for those that are on long word boundaries


; IDE disk interface I/O locations for Read functions

bIDE	equ	$FFF00000+REGBASE	; base address

IDEDR	equ	bIDE-REGBASE+($00*REGLSTEP); Data Register (16-bit reg)
IDEER	equ	bIDE+($01*REGLSTEP)	; Error Register
IDESC	equ	bIDE+($02*REGLSTEP)	; Sector Count
IDESN	equ	bIDE+($03*REGLSTEP)	; Sector Number
IDECL	equ	bIDE+($04*REGLSTEP)	; Cylinder Low
IDECH	equ	bIDE+($05*REGLSTEP)	; Cylinder High (2 bits)
IDESDH	equ	bIDE+($06*REGLSTEP)	; SDH register
IDESR	equ	bIDE+($07*REGLSTEP)	; Status Register
IDEASR	equ	bIDE+($0E*REGLSTEP)	; Alternate Status Register
IDEDAR	equ	bIDE+($0F*REGLSTEP)	; Drive Address Register



; IDE disk interface I/O locations for Write functions

;IDEDR	equ	bIDE-REGBASE+($00*REGLSTEP); Data Register (16-bit reg)
IDEWPR	equ	bIDE+($01*REGLSTEP)	; Write Precomp Register (not used)
;IDESC	equ	bIDE+($02*REGLSTEP)	; Sector Count
;IDESN	equ	bIDE+($03*REGLSTEP)	; Sector Number
;IDECL	equ	bIDE+($04*REGLSTEP)	; Cylinder Low
;IDECH	equ	bIDE+($05*REGLSTEP)	; Cylinder High (2 bits)
;IDESDH	equ	bIDE+($06*REGLSTEP)	; SDH register
IDECR	equ	bIDE+($07*REGLSTEP)	; Command Register
IDEDOR	equ	bIDE+($0E*REGLSTEP)	; Digital Output Register




