Signal Name | Total Product Terms | Product Terms | Location | Power Mode | Pin Number | PinType | Pin Use
--- | --- | --- | --- | --- | --- | --- | ---
use_pia/pia_portb_0__or0000/use_pia/pia_portb_0__or0000_D2 | 2 | 1_1 2_3 | MC1 | LOW |  | (b) | (b)
use_pia/pia_ddrb_0__or0000/use_pia/pia_ddrb_0__or0000_D2 | 2 | 2_1 2_2 | MC2 | LOW | 63 | I/O | (b)
use_pia/pia_crb2 | 3 | 3_1 3_2 3_3 | MC3 | LOW |  | (b) | (b)
use_cartemu/cfg_usdx<1> | 3 | 4_1 4_2 4_3 | MC4 | LOW |  | (b) | (b)
use_cartemu/cfg_usdx<0> | 3 | 5_1 5_2 5_3 | MC5 | LOW | 64 | I/O | (b)
use_cartemu/cfg_source_ram | 3 | 6_1 6_2 6_3 | MC6 | LOW | 65 | I/O | (b)
use_cartemu/cfg_mode<2> | 3 | 7_1 7_2 7_3 | MC7 | LOW |  | (b) | (b)
use_cartemu/cfg_mode<1> | 3 | 8_1 8_2 8_3 | MC8 | LOW | 66 | I/O | (b)
use_cartemu/cfg_sram_enable | 4 | 9_1 9_2 9_3 9_4 | MC9 | LOW | 67 | I/O | (b)
use_cartemu/cfg_menu | 4 | 10_1 10_2 10_3 10_4 | MC10 | LOW |  | (b) | (b)
use_freezer/use_status_as_ram_address<0> | 5 | 11_1 11_2 11_3 11_4 11_5 | MC11 | LOW | 68 | I/O | (b)
use_freezer/rom_bank_2 | 5 | 12_1 12_2 12_3 12_4 12_5 | MC12 | LOW | 70 | I/O | (b)
use_freezer/rom_bank_1 | 5 | 13_1 13_2 13_3 13_4 13_5 | MC13 | LOW |  | (b) | (b)
use_freezer/rom_bank_0 | 5 | 14_1 14_2 14_3 14_4 14_5 | MC14 | LOW | 71 | I/O | I
use_cartemu/trig3_disable_atari | 5 | 15_1 15_2 15_3 15_4 15_5 | MC15 | LOW | 72 | I/O | I
$OpTx$INV$490 | 6 | 16_1 16_2 16_3 16_4 16_5 17_2 | MC16 | LOW |  | (b) | (b)
refresh | 1 | 17_1 | MC17 | LOW | 73 | I/O | O
use_cartemu/N50/use_cartemu/N50_D2 | 9 | 18_1 18_2 18_3 18_4 18_5 1_2 1_3 1_4 1_5 | MC18 | LOW |  | (b) | (b)

Signals Used By Logic in Function Block

1. $OpTx$FX_DC$499
2. $OpTx$FX_DC$508
3. $OpTx$FX_DC$521
4. $OpTx$FX_DC$601
5. N0/N0_TRST
6. d<2>.PIN
7. d<1>.PIN
8. d<0>.PIN
9. a<0>
10. a<10>
11. a<1>
12. a<2>
13. a<3>
14. a<4>
15. a<5>
16. a<6>
17. a<7>
18. a<8>
19. a<9>
20. cartemu_enable_n
21. powerup_n
22. reset_n_sync<1>
23. rw
24. use_cartemu/N4/use_cartemu/N4_D2
25. use_cartemu/SFDecomp_100/use_cartemu/SFDecomp_100_D2
26. use_cartemu/address_19_and0000/use_cartemu/address_19_and0000_D2
27. use_cartemu/cctl_dout_and0000/use_cartemu/cctl_dout_and0000_D2
28. use_cartemu/cfg_bank<0>
29. use_cartemu/cfg_enable
30. use_cartemu/cfg_menu
31. use_cartemu/cfg_mode<0>
32. use_cartemu/cfg_mode<1>
33. use_cartemu/cfg_mode<2>
34. use_cartemu/cfg_source_ram
35. use_cartemu/cfg_sram_bank<0>
36. use_cartemu/cfg_sram_bank_not0001/use_cartemu/cfg_sram_bank_not0001_D2
37. use_cartemu/cfg_sram_enable
38. use_cartemu/cfg_usdx<0>
39. use_cartemu/cfg_usdx<1>
40. use_cartemu/cfg_write_enable
41. use_cartemu/usdx_bank<0>
42. use_freezer/next_state_FSM_FFd1
43. use_freezer/next_state_FSM_FFd2
44. use_freezer/next_state_FSM_FFd3
45. use_freezer/next_state_cmp_eq0001/use_freezer/next_state_cmp_eq0001_D2
46. use_freezer/rom_bank_0
47. use_freezer/rom_bank_1
48. use_freezer/rom_bank_2
49. use_freezer/use_status_as_ram_address<0>
50. use_pia/pia_crb2