The Reasons
Ultimate1MB module was created as my response to many ealier attempts (including my owns) to create memory expansion, that would allow easy installation regardless of machine type one chooses, plus it had to be not intrusive to original hardware - situation when end user would have to cut some traces was not acceptable.

And I succeeded - well Almost I would have, if Xilinx 5V tollerant XC95144XL chips were truly 5V tollerant

Features
Ultimate1MB expansion was designed with few things in my mind:
• to be as much solderless as possible (only RW, PHI2, HALT and RESET lines need soldering)
• fully flashable SpartaDOS-X with up to 320kbytes for its purposes
• RTC module for SDX with battery backup and NVRAM
• fully flashable 4 OS ROM slots
• hardware WRITE PROTECT for whole Flash array
• configurable memory expansion with 4 modes of operation (disabled, 320k RAMBO, 578k COMPY SHOP, 1088k RAMBO)
• customizable BASIC and MISSLE COMMAND slots (also flashable)
• System select/Memory exp mode select from integrated BIOS

Not that well though
At the beggining, my concept was to leave generic MMU as it was, and just to intercept some signals when needed. Result was I had whole MMU inside my HDL code plus I have to deal with disabling and enabling old one outside when needed.

After some thoughts it appeared I need another control singal to take over from original part, and that was a last straw - it had to go. It was combination of bad and broken anyways and i could save some space and achive better results having it emulated rather than physically present on board.

How it works?
Since solderless approach was the main driving force behind this, some portions of PIA and GTIA chips had to be simulated within the CPLD chip.

When PORTB write is detected, hardware checks if internal shadow of PBCTL (D303) allows writes, and if so, value from Data bus is written to PORTB shadow. In the parallel, last value of PORTB shadow registers is stored into internal MMU CONTROL register to preserve current status of system rom, basic, self-test and missile command rom chips mappings, thus allowing flawless access to whole extended memory array.

Since there is internal SDX module care had to be taken for GTIA TRIG3 register.

Normally RD5 line from cartridge port is connected both to MMU chip and GTIA TRIG3 lines and since the goal was to incorporate this extension without the need of cutting any traces on motherboard, this register had to be shadowed (OS checks for TRIG3 status on every NMI, if there is a change on state of this line, OS assumes that cartridge was put in/removed and to prevent failures goes into endless loop).

With this shadow of TRIG3 register system can be fooled, and enabling or disabling "external" (to SDX module) cartridges can be done.

Lastly, there is configuration register which is used for configuring the extension according to configuration data stored in NVRAM - user can choose which OS ROM should be booted on power-on, what memory size machine should have and if SDX and RTC modules should be enabled.

Every time RESET button is pressed, Ultimate1MB BIOS kicks in, and checks if HELP key is pressed. If so, then interactive menu pops up, enabling user to change current configuration. Otherwise, checksum is calculated from the bytes read from NVRAM, if this matches checksum read from NVRAM, then configuration is assumed as valid one, and written into configuration registers. Then normal boot follows.

Final words
There is still some room for improovement, and integrating some fixes that was nessesary to make it stable (due to Xilinx 5V tolerance issues), plus I have some space left on CPLD, so this is not my last word for this project, but, never the less, I'm pretty satified - installation is extremaly easy, and I can trully call it one that fits all.